An Efficient Hardware Implementation of Finite Field Inversion for Elliptic Curve Cryptography
Thirumalesu Kudithi1, Sakthivel R2
1Thirumalesu Kudithi, School of Electronics Engineering, Vellore Institute of Technology, Vellore-632014, India.
2Sakthivel R, School of Electronics Engineering, Vellore Institute of Technology, Vellore-632014, India.
Manuscript received on 25 June 2019 | Revised Manuscript received on 05 July 2019 | Manuscript published on 30 July 2019 | PP: 827-832 | Volume-8 Issue-9, July 2019 | Retrieval Number: I7605078919/19©BEIESP | DOI: 10.35940/ijitee.I7605.078919
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: The modular inversion operation is an essential hardware design for computing speed when we use it in cryptography applications. Through this work, we present a FSM based design methodology to achieve speed, area and high-performance modular binary inversion algorithm over 256-bit prime field. The proposed architecture implemented using Xilinx Virtex-7 FPGA device, it achieves 37% reduction in area-delay product and 15% and 16% of improvement in speed and throughput respectively, when compared with existing designs. Also, ASIC based implementation is done using TSMC 65nm CMOS technology, the synthesis results achieved the maximum operating clock frequency is 833 MHz and throughput of 626Mbps, which makes it suitable for speed-critical cryptoapplications.
Index Terms: Modular Inversion, Field-Programmable Gate-Array (FPGA), Elliptic Curve cryptography (ECC), Application Specific Integrated Chip (ASIC).
Scope of the Article: Cryptography and Applied Mathematics