Design of Watchdog Timer for Real Time Applications
S. Shilpa1, Ch. Umashankar2, S V S Prasad3
1S. Shilpa, Graduate, Department of Electronics and Communication Engineering, MLR Institute of Technology, Hyderabad, India.
2Ch. Umashankar, Assistant Professor, Department of Electronics and Communication Engineering, MLR Institute of Technology, Hyderabad, India.
3S V S Prasad, Professor, HOD, Department of Electronics and Communication Engineering, MLR Institute of Technology, Hyderabad, India.
Manuscript received on 20 August 2019 | Revised Manuscript received on 27 August 2019 | Manuscript Published on 31 August 2019 | PP: 695-697 | Volume-8 Issue-9S2 August 2019 | Retrieval Number: I11430789S219/19©BEIESP DOI: 10.35940/ijitee.I1143.0789S219
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open-access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: The Embedded system is employ in safety and critical application, which is greater reliability. The watchdog timers are used in automatic systems to handle the operation time for secure the timer failure. Majority of the watchdog timers used an additional circuit to adjust their timeout position and it will provide limited services in terms of working. This paper presents the architecture of a watchdog timer and also gives the design structure, it will working in safety and critical conditions. The operations are general and it can be used to monitor the working of any processor in real-time application. This paper discussed the implementation of the proposed timer in a FPGA. This will helps to design easily in different applications, it will gives reduces the overall system cost. The watchdog timers is to detect and give response very effectively and also gives the responses of faults by analyzing the simulations.
Keywords: Watchdog Timer, Computer, Clock
Scope of the Article: Dstributed Mobile Applications Utilizing IoT