Loading

Power Analysis of Digital Circuits for VLSI Applications
Shikha Bathla1, Nidhi Gaur2, Ayush Uniyal3

1Shikha Bathla, Department of  ECE, Amity University, Noida, India.

2Nidhi Gaur, Department of  ECE, Amity University, Noida, India.

3Ayush Uniyal, Department of  ECE, Amity University, Noida, India.

Manuscript received on 05 August 2019 | Revised Manuscript received on 12 August 2019 | Manuscript Published on 26 August 2019 | PP: 508-511 | Volume-8 Issue-9S August 2019 | Retrieval Number: I10800789S19/19©BEIESP | DOI: 10.35940/ijitee.I1080.0789S19

Open Access | Editorial and Publishing Policies | Cite | Mendeley | Indexing and Abstracting
© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open-access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: In this modern world, power plays a very important role in designing of electronic circuits. Portable devices like mobile phones, laptops require electronic circuits that consume less power. Power dissipation causes invariably rise in temperature of electronic circuits. As the temperature increases, the power gets dissipated more. MTCMOS (Multi-Threshold Complementary Metal Oxide semiconductor) power gating is a design technique that reduces power dissipation. It results in the prevention of sub-threshold leakage in standby mode and high speed operation with low power consumption in active mode. In this paper, MTCMOS based MUX is designed and is compared with CMOS MUX and PTL (Pass Transistor Logic) based MUX. It has been concluded that MTCMOS based MUX consumes 16.56% and 15.19% less power than CMOS MUX and PTL MUX respectively. Results are simulated in Mentor Graphics version 10.2.

Keywords: PTL, Power Gating, Power Dissipation, MTCMOS.
Scope of the Article: Nanometer-Scale Integrated Circuits