Performance Comparison of Dynamic Bias Comparators
K V K V L. Pavan Kumar1, G L Sravanthi2, V.S.V. Prabhakar3, Vijaya Lakshmi P4, Bindu Priya K5, K Sai Akhil6, K.Sai Nikhil7, K. Hari Kishore8

1K V K V L Pavan Kumar, Associate Professor, Department of Electronics and Communications Engineering, Koneru Lakshmaiah Education and Foundation, India.

2G L Sravanthi, Associate Professor, Department of Computer Science and Engineering, Vignan’s Nirula Institute of Technology & Science for Women, India.

3V S V Prabhakar, CISCO Chair at IIDT International Institute of Digital Technologies,  India.

4Vijaya Lakshmi P, Department of Electronics and Communications Engineering, Koneru Lakshmaiah Education and Foundation, India.

5Bindu Priya K, Department of Electronics and Communications Engineering, Koneru Lakshmaiah Education and Foundation, India.

6K. Sai Akhil, Department of Electronics and Communications Engineering, Koneru Lakshmaiah Education and Foundation, India.

7K Sai Nikhil, Department of Electronics and Communications Engineering, Koneru Lakshmaiah Education and Foundation, India.

8K. Hari Kishore, Department of Electronics and Communications Engineering, Koneru Lakshmaiah Education and Foundation, India.

Manuscript received on 04 May 2019 | Revised Manuscript received on 09 May 2019 | Manuscript Published on 13 May 2019 | PP: 110-114 | Volume-8 Issue-7S May 2019 | Retrieval Number: G10230587S19/19©BEIESP

Open Access | Editorial and Publishing Policies | Cite | Mendeley | Indexing and Abstracting
© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open-access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: This paper encloses the performance comparison of dynamic bias based double-tail latch and Elzakker’s comparators using HEP 1 by MENTOR GRAPHICS in 130nm CMOS process. Power, delay & PDP of these comparators are compared with & without using dynamic bias that results in significant improvement of these parameters Performance comparison of these parameters utilize 500MHz frequency. Dynamic bias comparators may scale back the common energy consumption when compared to the prior comparators.

Keywords: Dynamic bias, Double-tail Latch Comparator, Successive Approximation Register (SAR), Elzakker Comparator, Analog-to-Digital Converter (ADC).
Scope of the Article: Communications