Design of Diversified Low Power and High-Speed Comparators using 45nm Cmos Technology
C.Arunabala1, P.V. Sai Ranjitha2, Bomminayuni Likhitha Gunturu Sravya3, Bonagiri Navyasree4, Arumalla Mounika5
1Dr. C. Arunabala*, Department of Electronics & Communication Engineering, Jawaharlal Nehru Technological University, Kakinada. Guntur (A.P), India.
2P.V.Sai Ranjitha, Department of Electronics & Communication Engineering, Jawaharlal Nehru Technological University, Kakinada. Guntur (A.P), India.
3Bomminayuni Likhitha Gunturu Sravya, Department of Electronics & Communication Engineering, Jawaharlal Nehru Technological University, Kakinada. Guntur (A.P), India.
4Bonagiri Navyasree, Department of Electronics & Communication Engineering, Jawaharlal Nehru Technological University, Kakinada. Guntur (A.P), India.
5Arumalla Mounika, Department of Electronics & Communication Engineering, Jawaharlal Nehru Technological University, Kakinada. Guntur (A.P), India.
Manuscript received on 29 March 2022. | Revised Manuscript received on 04 April 2022. | Manuscript published on 30 April 2022. | PP: 27-31 | Volume-11 Issue-5, April 2022. | Retrieval Number: 100.1/ijitee.E98490411522 | DOI: 10.35940/ijitee.E9849.0411522
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: At Present, portable battery-operated devices are enhancing due to low power consumption and high-speed applications, The designed circuit with feedback are used to design novel circuits. If the comparator having feedback are without clock signal. The comparators are mainly designed to minimize the power consumption and with good accuracy because of clock signal, if the clock signal is there, it is used to drive the circuit with low current. But in the existed design the circuit is with high power and current. These drawbacks are overcome by using the projected designed comparator. The Projected comparator design is with reduced power consumption, propagation delay, currents and with a smaller number of transistors. The comparators are useful in analog to digital converters. And this is simulated by using 45 nm CMOS technology Cadence Virtuoso tool.
Keywords: Existed Dynamic Comparator, Projected Comparator, 45nm CMOS Technology and Cadence Virtuoso Tool.
Scope of the Article: High Speed Networks