A New Binary Tree Approach of Huffman Code
Asha Latha P1, Rambabu B2
1Asha Latha, is pursuing M.Tech(VLSI) in the Department of Ece at Kaushik College of Engineering, Visakhapatnam, (A.P), India.
2B. Rambabu, Assoc Prof, Ece at Kaushik College of Engineering & Technology, Visakhapatnam, (A.P), India.
Manuscript received on October 01, 2012. | Revised Manuscript received on October 20, 2012. | Manuscript Published on September 10, 2012. | PP: 59-62 | Volume-1 Issue-4, September 2012. | Retrieval Number: D0259081412/2012©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Lossless compression of a sequence of symbols is important in Information theory as well as today’s IT field. Huffman coding is lossless and is most widely used. However, Huffman coding has some limitations depending on the stream of symbols appearing in a file. In fact, Huffman coding generates a code with very few bits for a symbol that has a very high probability of occurrence and a larger number of bits for a symbol with a low probability of occurrence [1]. In this paper, we present a novel technique that subdivides the original symbol sequence into two or more sub sequences. We then apply Huffman coding on each of the sub sequences. This proposed scheme gives approximately 10-20% better compression in comparison with that of straightforward usage of Huffman coding. The target FPGA deivce for implementing the design is Xilinx Xc3s500E.The devices utilises 9% and 17% of the total flip flops and LUT’s in the FPGA. The total power consumed the device 0.041W.
Keywords: Huffman decoding, Table lookup.