Implementation of Fused Add and Multiply Operator using Radix 8 Algorithm
K. Ramya1, V. B. K. L Aruna2
1K. Ramya, Department of ECE, Velagapudi Ramakrishna Siddhartha Engineering College, Vijayawada (Andhra Pradesh), India.
2V. B. K. L Aruna, Department of ECE, Velagapudi Ramakrishna Siddhartha Engineering College, Vijayawada (Andhra Pradesh), India.
Manuscript received on 10 July 2015 | Revised Manuscript received on 20 July 2015 | Manuscript Published on 30 July 2015 | PP: 34-37 | Volume-5 Issue-2, July 2015 | Retrieval Number: B2148075215/15©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: many complex arithmetic operations are based on addition and multiplication operations which are used in many DSP applications. This paper presents implementation of add-multiply operation by using conventional and fused design architectures. In the proposed paper a modified booth recoding technique for implementation of fused add-multiply (FAM) operator is introduced. By using modified booth recoding technique [2] partial products in multiplication will be reduced to half and further implementation of FAM by using radix8 booth algorithm is done which reduces the partial products further to one third of the number [1].After comparing all the architectures, the proposed radix8 booth algorithm yields considerable reductions in terms of area and critical path delay as compared to radix4 booth algorithm. The proposed design is targeted on a XILINX virtex-6 device and examined using VHDL simulator in XILINX 14.2 version.
Keywords: Add-multiply Operator, Modified Booth Recoding, Partial Products and Radix8 Algorithm.
Scope of the Article: Algorithm Engineering