Distributed Computing Solution for Hardware-in-Loop Simulation of Indian Satellites
Rashmi Jagade1, Sridevi.K.N2, Jitendranath Mungara3
1Ms.Rashmi Jagade, Computer Science and Engineering, CMRIT,Bangalore, India.
2Mrs Sridevi K.M, Asst.Prof: Dept. ofComputer Science and Engineering, CMRIT,Bangalore, India.
3Dr. JitendranathMungara,Prof& Dean: Dept. ofComputer Science and Engineering, CMRIT, Bangalore, India.
Manuscript received on July 01, 2012. | Revised Manuscript received on July 05, 2012. | Manuscript published on July 10, 2012. | PP: 143-147 | Volume-1, Issue-2, July 2012. | Retrieval Number: B0170071212/2012©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: The purpose of Hardware-In-Loop-Simulation (HILS) is to verify the hardware interface of On-Board- Computer (OBC) with flight sensors and actuators and to validate the closed loop performance of attitude and control elements (AOCE) for various control modes in real-time. This document presents distributed computingconfiguration of computing elements that interact mutually to achieve the real-time performance of hardware-in-loop simulation. The system architecture proposed is used successfully toaccomplish the real time closed loop performance for HILS. By distribution of resources, we can achieve thecomplex computationrequirements of spacecraft dynamics simulation, telemetry (TM), telecommand (TC) and star simulation with optimized delay.
Keywords: HILS;AOCE;Real-time; Computing elements