Comparison between two Hardware Implementations of a Formal Neuron on FPGA Platform
Boussaa Mohamed1, Bennis Abdelattif2, Atibi Mohamed3
1Mr. Mohamed Boussaa, Hassan II Mohammedia Casablanca University, Laboratory of Information Processing, Cdt Driss El Harti, BP Sidi Othman Casablanca Morocco, USA.
2Dr. Abdellatif Bennis, Hassan II Mohammedia Casablanca University, Laboratory of Information Processing, Cdt Driss El Harti, BP Sidi Othman Casablanca, Morocco, USA.
3Mr. Mohamed Atibi, Hassan II Mohammedia Casablanca University, Laboratory of Information Processing, Cdt Driss El Harti, BP Sidi Othman Casablanca, Morocco, USA.
Manuscript received on 12 June 2014 | Revised Manuscript received on 19 June 2014 | Manuscript Published on 30 June 2014 | PP: 52-56 | Volume-4 Issue-1, June 2014 | Retrieval Number: A1706064114/14©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: The formal neuron is equivalent to a simple processor that performs a series of mathematical operations more or less complex on real data. The chosen representation to encode these data is the 32 bits floating point representation; this makes possible to achieve satisfactory precision in calculation. This paper presents a hardware comparison between two formal neurons, one is associated with the sigmoid activation function and the other to the gaussian activation function. This comparison is designed firstly to compare the hardware results obtained respectively from these two implementations with software results, and secondly, to make comparison between the two hardware implementations in terms of the consumed material resources and execution time. These neurons are implemented by using a number of specific blocks called megafunction, on an FPGA platform of Altera DE2-70 which offers several advantages, including flexibility, efficiency and speed.
Keywords: Formal Neuron, FPGA, Hardware Resources, Execution Time, Mega Function.
Scope of the Article: Software Defined Networking and Network Function Virtualization