On-Chip High Speed Optical Interconnect with RLCG Electrical Interconnect: Challenges and Dimensions
Nemi Chand Neel1, Ajay Kumar Banyal2, Manu Kumar Sharma3
1Nemi Chand Neel, Department of Electronics and Communication Engineering, Baldev Ram Mirdha Institute of Technology, Jaipur (Rajasthan), India.
2Ajay Kumar Banyal, Department of Electronics and Communication Engineering, Baldev Ram Mirdha Institute of Technology, Jaipur (Rajasthan), India.
3Manu Kumar Sharma, Department of Electronics and Communication Engineering, Baldev Ram Mirdha Institute of Technology, Jaipur (Rajasthan), India.
Manuscript received on 11 June 2013 | Revised Manuscript received on 17 June 2013 | Manuscript Published on 30 June 2013 | PP: 251-256 | Volume-3 Issue-1, June 2013 | Retrieval Number: A0960063113/13©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Intrachip optical interconnects(OIs) have the potential to outperform electrical wires and to ultimately solve the communication bottleneck in high-performance integrated circuits. Performance targets and critical directions for Ics progress are yet to be fully explored. In this paper, the International Technology Roadmap for Semiconductors (ITRS) is used as a reference to explore the requirements that silicon-based Ics must satisfy to successfully outperform copper electrical interconnects (IEs). Consiering the state-of-art devices, these requirements are extended to specific IC components.
Keywords: Integrated Optoelectronic Circuits, Optoelectron Ics, Optical Interconnects(Ics), Silicon Photonics.
Scope of the Article: High Speed Networks