Loading

VHDL Implementation of IDEA Architectures
A. D. Chaudhari1, S. D. Shirbahadurkar2

1Ms. A.D. Chaudhari, Department of E&TC, Padmabhooshan Vasantdada Patil Institute of Technology, Bavdhan, Pune (Maharashtra), India.
2Dr. S.D. Shirbahadurkar, Department of E&TC, Padmabhooshan Vasantdada Patil Institute of Technology, Bavdhan, Pune (Maharashtra), India.
Manuscript received on 11 June 2013 | Revised Manuscript received on 17 June 2013 | Manuscript Published on 30 June 2013 | PP: 148-150 | Volume-3 Issue-1, June 2013 | Retrieval Number: A0930063113/13©BEIESP
Open Access | Editorial and Publishing Policies | Cite | Mendeley | Indexing and Abstracting
© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: Cryptography is the art of keeping data secure from unauthorized access so as to guarantee that only the intended users can access it. Data security is an important issue in computer networks and cryptographic algorithms are essential parts in network security.This paper covers the implementation of the International Data Encryption Algorithm (IDEA) using Very Large Scale Integrated Circuits Hardware Description Language (VHDL) with the help of Xilinx – ISE 9.1. In terms of security, this algorithm is very much superior. In IDEA, the plaintext and the cipher text are 64 bit blocks, while the secret key is 128 bit long. The cipher is based on the design concept of mixing operations from different algebraic groups.
Keywords: Cryptographic Algorithm, IDEA, Modulo Multiplier, VHDL, Xilinx.

Scope of the Article: Network Architectures