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A Fast FPGA Based Architecture for Skin Region Detection
Santanu Halder1, Abul Hasnat2, Amina Khatun3, Debotosh Bhattacharjee4, Mita Nasipuri5

1Dr. Santanu Halder, Assistant Professor, Department of Computer Science and Engineering, Government College of Engineering Textile Technology, Berhampore (West Bengal), India.
2Mr. Abul Hasnat, Assistant Professor, Department of Computer Science and Engineering, Government College of Engineering Textile Technology, Berhampore, (West Bengal), India.
3Ms. Amina Khatun, M.Tech, Student, Jadavpur University, (West Bengal), India.
4Dr. Debotosh Bhattacharjee, Associate Professor, Department of Computer Science and Engineering, Jadavpur University, Kolkata (West Bengal), India.
5Dr. M. Nasipuri, Professor, Department of Computer Science and Engineering, Jadavpur University, Kolkata (West Bengal), India.
Manuscript received on 11 June 2013 | Revised Manuscript received on 17 June 2013 | Manuscript Published on 30 June 2013 | PP: 1-4 | Volume-3 Issue-1, June 2013 | Retrieval Number: A0867063113/13©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: This paper presents an efficient FPGA based architecture for skin region detection algorithm from a facial image. A lot of research work has been carried out on skin region detection for image processing applications. But there is a very limited work to design a hardware module for the same purpose which is very useful for a real time system where speed is a key factor. In this paper, an attempt has been made towards the designing of an efficient FPGA based skin region detection algorithm which is better than the existing architectures in respect of both space and time complexity. The methodology proposed by Zhang et al. in 2000, has been chosen as the skin region detection algorithm for the present work due to its property of simplicity resulting in faster computation. The experimental result shows a significant improvement in space complexity over an existing architectures and the module is able to operate at 285.919MHz speed which is more than twice of the operating speed of the existing architectures.
Keywords: Skin Detection, Pixel Classification, FPGA, YIQ.

Scope of the Article: Network Architectures