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Nano Power Current Reference Circuit consisting of Sub-threshold CMOS Circuits
Ashutosh Kumar Singh1, Kamal Bhati2

1Ashutosh Kumar Singh, Department of Electronics and Communication Engineering, Noida Institute of Engineering and Technology, Noida
2Kamal Bhati Department of Electronics and Communication Engineering, Noida Institute of Engineering and Technology, Noida.

Manuscript received on October 16, 2019. | Revised Manuscript received on 25 October, 2019. | Manuscript published on November 10, 2019. | PP: 4657-4660 | Volume-9 Issue-1, November 2019. | Retrieval Number: L26091081219/2019©BEIESP | DOI: 10.35940/ijitee.L2609.119119
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: A low voltage CMOS Nano power current reference circuit has been presented in this paper and also the circuit simulation performance in 180-nm UMC CMOS technology. Most of the MOSFETs operate in sub-threshold region consisting of bias-voltage, start-up and current-source sub-circuits. A stable reference current of 4-nA lying in supply voltage range of 1 V-1.8 V has been generated with line sensitivity of 0.203% /V. Within the temperature range of 0°C to 100 °C, and the voltage level of 1.8 V, the temperature coefficient was 7592ppm/°C. At the same voltage supply, the power dissipation was found out to be 380 NW. It is suitable to use this circuit in sub threshold power aware large scale integration.
Keywords: Low Power, Low Voltage, Sub Threshold, Temperature Coefficient
Scope of the Article: Low-power design