Performance Analysis of a 15-Level Cascaded Multilevel Inverter
K.C. Ramya1, S. Sheeba Rani2, K. Vinoth Kumar3, S. Sivaranjani4, S.R. Boselin Prabhu5

1K.C. Ramya, Associate Professor, Department of Electrical and Electronics Engineering, Sri Krishna College of Engineering and Technology, Coimbatore (TamilNadu), India.

2S. Sheeba Rani, Associate Professor, Department of Electrical and Electronics Engineering, Sri Krishna College of Engineering and Technology, Coimbatore (TamilNadu), India.

3K. Vinoth Kumar, Assistant Professor, Department of Electrical and Electronics Engineering, Karunya Institute of Technology and Sciences, Coimbatore (TamilNadu), India.

4S. Sivaranjani, Assistant Professor, Department of Electrical and Electronics Engineering, Sri Krishna College of Engineering and Technology, Coimbatore (TamilNadu), India.

5S.R. Boselin Prabhu, Associate Professor, Department of Electronics and Communication Engineering, Surya Engineering College, Erode, India.

Manuscript received on 05 April 2019 | Revised Manuscript received on 14 April 2019 | Manuscript Published on 24 May 2019 | PP: 170-172 | Volume-8 Issue-6S3 April 2019 | Retrieval Number: F10320486S319/19©BEIESP

Open Access | Editorial and Publishing Policies | Cite | Mendeley | Indexing and Abstracting
© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open-access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: Multilevel Inverters (MI) are comprehensively used in both medium / high voltage applications because of its higher output and lower switching losses. The harmonics problem will automatically get reduced in case of MI by increasing the levels of an inverter. However, this results in increased cost and size the inverter. Hence in order to overcome this problem, this work proposed a novel 15 level MI topology with reduced switches. Space Vector Pulse Generation Circuit (SVPWM) is instigated to produce switching pulses for MI. Thus the efficacy of the proposed topology is validated using the MATLAB software. From the obtained outcomes, it is confirmed that this proposed topology results in better harmonic reduction with low switching losses.

Keywords: MI, Cascaded H- Bridge Inverter (CHBI), SVPWM, THD.
Scope of the Article: Communication