Secure and area Efficient Implementation of Digital Image Watermarking on Reconfigurable Platform
Altaf O. Mulani1, P. B. Mane2
1Altaf O. Mulani, Department of Electronics & Telecommunication, AISSMS Institute of Information Technology, Pune (Maharashtra), India.
2Dr. P. B. Mane, Department of Electronics & Telecommunication, AISSMS Institute of Information Technology, Pune (Maharashtra), IndiaManuscript received on 12 December 2018 | Revised Manuscript received on 23 December 2018 | Manuscript published on 30 December 2018 | PP: 56-61 | Volume-8 Issue-2, December 2018 | Retrieval Number: B2545128218/18©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Now a day digital data is easy to process but it permits unauthorized consumers to access this information. To protect this information from unauthorized access, cryptography and watermarking are the commonly used techniques. In this paper, implementation of fast and area efficient Discrete Wavelet Transform (DWT) oriented invisible image watermarking system integrated with cryptography on reconfigurable platform is suggested. In DWT implementation, simplified formulae are derived for generation of approximation and detailed coefficients due to which this operation utilizes simply 306 slice registers and its maximum operational frequency is 556.174 MHz. In AES implementation, keys are initially generated using MATLAB and then these keys are used in the Xilinx System Generator based model due to which this implementation occupies 121 slice registers and its maximum operating frequency is 1102.536 MHz. Complete system is designed using Xilinx SysGen tool and Vivado. Simulation is accomplished using MATLAB Simulink. Watermark embedding system is implemented on Artix7 FPGA (xc7a100t-1csg324) and it utilizes 2961 slices at maximum operating frequency of 148.895 MHz. Watermark extraction system is implemented on Artix7 FPGA (xc7a35t-1cpg236) and it occupies 87 slices.
Keyword: Watermarking, Cryptography, DWT, AES, FPGA, VLSI.
Scope of the Article: VLSI Algorithms