Loading

T-NOT Gate : A Novel Circuit based on Ternary Logic
Amit Verma1, Manish Prateek2

1Amit Verma, Department of Computer Science Informatics, University, Petroleum and Energy Studies, Dehradun (Uttarakhand), India.
2Manish Prateek, Department of Computer Science, University, Petroleum and Energy Studies, Dehradun (Uttarakhand), India.
Manuscript received on 05 February 2019 | Revised Manuscript received on 13 February 2019 | Manuscript published on 28 February 2019 | PP: 666-671 | Volume-8 Issue-4, February 2019 | Retrieval Number: D2823028419/19©BEIESP
Open Access | Editorial and Publishing Policies | Cite | Mendeley | Indexing and Abstracting
© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: In this paper a novel circuit for the t-NOT gate is proposed using op-amp 741 IC and the basis AND and OR binary gate. Proposed circuit is based on the concept of ternary logic, where the term ternary means three logic that is 0, 1 and 2 instead of traditional two logic 0,1 (binary). As the ternary logic can be the altenate for the radix 2 that is binary logic to reduce the transition delay, enhance the processing speed, reduce the memory requirement, reduce circuit complexity and number of electronic components The truth table, symbol and state transition diagram is also presented in the paper. Which show that t-NOT gate is a unary gate that takes single input and provide the next immediate logic in clockwise cyclic direction as the output as shown in the state transition diagram mention in the paper. Further the standard working of op-amp 741 IC is discussed, the actual voltmeter reading for various input voltages greater than the upper limit +VCC is presented in tabular format. Simulation of the binary AND and OR gate is carried out using proteus to prove that the current binary AND, OR gate can be used as MIN and MAX gate for logic circuits of higher radix. Here the MIN and MAX logic means the gate giving the minimum and maximum voltage as the output voltage among the various input voltages.
Keyword: Op-amp 741 IC, Ternary, Multi-Valued Logic.
Scope of the Article: Digital System and Logic Design