Approximate Reverse Carry Propagate Adder for Energy-Efficiency
Inumula Veeraraghava Rao1, M.Aditya2, K Sai Priyanka3, S. Sai Rahul4, P. Sathwik5
1I. Veeraraghava Rao, Assistant Professor, ECE Department, KL (Deemed to be University) Having Keen Interest in Wireless Communications and VLSI Technology.
2Aditya M, Assistant Professor, ECE Department, KL (Deemed to be University) Having Keen Interest in VLSI Technology and Wireless Communications and VLSI Technology
3K Sai Priyanka, B.Tech Final year, ECE Department, KL (Deemed to be University) Vaddeswaram, Having keen Interest in VLSI Technology.
4S Sai Rahul, B.Tech Final year, ECE Department, KL (Deemed to be University) Vaddeswaram, Having keen Interest in VLSI Technology.
5P Sathwik Reddy, B.Tech Final year, ECE Department, KL (Deemed to be University) Vaddeswaram, Having keen Interest in VLSI Technology.
Manuscript received on November 15, 2019. | Revised Manuscript received on 20 November, 2019. | Manuscript published on December 10, 2019. | PP: 3352-3356 | Volume-9 Issue-2, December 2019. | Retrieval Number: A4933119119/2019©BEIESP | DOI: 10.35940/ijitee.A4933.129219
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: The hypothesis of estimated measure is to design computation quality for computation efforts. The Approximate full adders (AFA’s) are the lead objective to reduce the length of carry propagation which is put through to the slightest error rate. Approximate adder comes up with important enhancement in delay, area and power. The developing attribute is carry doesn’t propagate in it. So in this we mainly use the hybrid adders where it utilizes the RCPFA. The approximate adder generates the input carry from higher bit to lower bit to produce carry output, , the weight of the carry reduces when it generates. In Reverse Carry Propagate Adder there are accomplishments to be completed those are the power, delay and energy. So, compared to the conventional ones the Approximate Mirror Adders (AMA’s) has less transistors compared to it. This is to establish on the internal structure of the mirror adder which consumes less area and power consumption as well as higher speed. The representation performed by the RCPFA and hybrid adders is observed and compared using Mentor Graphics. As a result, it consists of higher accuracies and specifies that, by working on the RCPFA in the hybrid adders can consists of improved consumption of area by 14%, consumption of power by 19.2%, consumption of delay by 27%.
Keywords: RCPFA, Approximate Adder, Approximate Mirror Adder, Mentor Graphics, Hybrid Adder, Conventional Adder, Accuracy, Delay.
Scope of the Article: Computer Graphics, Simulation, and Modelling